System and method for controlling simulation of hardware in a hardware development process
US7370312B1 · kind B1 · utility
10Cited by
7References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 31, 2005 |
| Grant date | May 6, 2008 |
| Priority date | — |
| Expiry date | Sep 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for simulating a digital circuit uses scheduling information for Term Rewriting System (TRS) rules to limit the computation of simulation values to only those value used by the rules scheduled to execute on the current state of the system. Typically only a small subset of TRS rules are scheduled to execute on any given state, thus only values related to this subset are computed. Such a determination may be made by leveraging the logical separation of rule activations and rule actions in a TRS system, such that only rule activation information need be examined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.