High-speed, high-resolution, low-power analog-to-digital converter
US7372384B1 · kind B1 · utility
Inventor
Key dates
| Filing date | Dec 15, 2006 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Dec 15, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/506
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An ADC and method comprises a hybrid-type sigma-delta modulator comprising a digital delta-stage and an analog sigma-stage, wherein the analog sigma-stage comprises an analog low-pass filter adapted to only pass a low frequency audio band between 0-20 khz of a PWM wave, and wherein the digital delta-stage comprises a PWM wave generator; a pair of MOSFETs; and a power supply unit outputting voltage to the pair of MOSFETs. The ADC comprises a comparator attached to the hybrid-type sigma-delta modulator; a low-pass filter configured in a digital domain and for receiving a signal output of the comparator and remove high-frequency components of the comparator output above the audio band; a PWM back converter adapted to receive the filtered signal output and translate the digital low-pass filtered signal output to a power supply transient value in a digital format; and a dither signal source for injecting a dither signal to the digital delta-stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.