Non-volatile semiconductor memory device having different erase pass voltages for respective memory sectors and associated erase method
US7372733B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2006 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Nov 14, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device comprises a plurality of memory sectors arranged in different memory banks having different bulk regions. The memory cells can be erased using a first mode erase operation, which determines different erase pass voltages for the respective memory sectors by successively increasing a bank voltage applied to each sector until the number of failed cells in each sector falls below a first failed cell threshold value, and a second mode erase operation, which applies the different erase pass voltages to the respective memory sectors for successively increasing periods of time until the number of failed cells in each sector falls below a second failed cell threshold value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.