Microphone bias circuit
US7372967B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2003 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Aug 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04R2499/11
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A microphone bias circuit includes a first integrated circuit (IC) pin, a second IC pin, a first resistor, and a variable supply voltage buffer. The first resistor is operably coupled to the first IC pin and a return voltage. The second IC pin is operably coupled to receive analog signals from a microphone. The variable supply voltage buffer is operably coupled to produce a buffered supply voltage based on a variable impedance setting, wherein at least one off-chip component couples the second IC pin to the first IC pin and wherein the variable supply voltage buffer provides the buffered supply voltage to second IC pin as a microphone bias voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.