Simultaneous channel estimation of a carrier and an interferer
US7373130B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 13, 2005 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Feb 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W56/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Interference suppression in a receiver in a wireless network that utilizes training sequences for synchronization and channel estimation, wherein the training sequence of an interfering channel overlaps the training sequence of a desired channel to cause degraded channel estimation, by generating a channel estimate for a carrier part of a received signal; generating a residual signal where the carrier part has been removed from the received signal; generating covariance matrix estimates for interferer channel estimate candidates; selecting carrier and interferer channel estimates having the lowest energy in the covariance matrix; and, explicitly generating the selected interferer channel estimate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.