Emptying packed data state during execution of packed data instructions
US7373490B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2004 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Apr 23, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30134
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method in a computer system, one embodiment includes accessing a packed data instruction and generating a corresponding set of control bits to cause a processor to alter a top of stack to zero of a programmer visible register file, accessing a floating point instruction and generating a corresponding set of control bits that cause the processor to operate on the programmer visible register file as a stack, but accessing a transition instruction between the packed data instruction and the scalar floating point instruction and generating a corresponding set of control bits to cause the processor to alter tag data to indicate that programmer visible register file is empty. The method advantageously provides a means for clearing the packed data state at the end of blocks of packed data instructions to leave the floating point state in a clear condition for subsequent operations (e.g. floating point calculations).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.