Automatic generation of structure and control path using hardware description language
US7373638B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2003 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | Jul 3, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Translating to a hardware description language (HDL) from an architecture description language (ADL) is disclosed. An architecture description that is written in the ADL and has a hierarchical organization is received. Decoders are generated, described in the HDL, from the architecture description written in the ADL. Control signals are generated, described in the HDL, from the architecture description written in the ADL. The decoders are configured to output the control signals and the control signals are input to functional units in order to preserve the hierarchical organization of the architecture description written in the ADL.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.