Secure supply of an integrated circuit
US7375502B2 · kind B2 · utility
4Cited by
5References
16Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Feb 7, 2006 |
| Grant date | May 20, 2008 |
| Priority date | — |
| Expiry date | Feb 7, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method and a circuit for scrambling the current signature of a load comprising at least one integrated circuit executing digital processings, including supplying at least the integrated circuit from a supply voltage external to the circuit by combining a current provided by a first linear regulator with a current provided by at least one capacitive switched-mode power supply circuit with one or several switched capacitances.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.