Differential comparator with a replica input stage to set the accurate bias current for improved common mode rejection
US7375559B1 · kind B1 · utility
10Cited by
2References
45Claims
0Family size
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Inventors
Key dates
| Filing date | Jul 7, 2005 |
| Grant date | May 20, 2008 |
| Priority date | — |
| Expiry date | Jan 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45244
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for properly biasing differential comparators are provided. Using a feedback relationship, a bias for a main stage that receives a first differential input of the comparator is produced. Separately, a feedback relationship produces a bias for a main stage that receives a second differential input. These biases, produced as a result of the feedback relationship between bias stages and stages that replicate the main stages, are applied to the main stages. The outputs of the differential comparator are differential outputs with improved common-mode rejection as a result of the feedback and replica biasing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.