Patent · US Active

Boosted clock circuit for semiconductor memory

US7376042B2 · kind B2 · utility

1Cited by

5References

20Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Josef Schnell · Vergennes, US
Helmut Seitz · Stuttgart, DE

Key dates

Filing date	Jul 25, 2006
Grant date	May 20, 2008
Priority date	—
Expiry date	Nov 16, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG11C7/222
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory component includes at least one memory bank array, a DQ region, a clock tree, and a voltage generator. The memory component is configured in a semiconductor wafer. The at least one memory bank array is configured such that data is read out of it during a read operation. The clock tree is coupled to the DQ region and is configured for driving data during the read operation. The voltage generator is coupled to at least some components of the clock tree in order to provide at least some of the components of the clock tree with an increased voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.