Register move instruction for section select of source operand
US7376813B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 4, 2005 |
| Grant date | May 20, 2008 |
| Priority date | — |
| Expiry date | Jul 21, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/355
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing apparatus execution unit includes a multiplexer having inputs receiving data from sections of a source data register or registers. The multiplexer selects data from one section to store in a destination data register. The execution unit may zero extend or sign extend the remaining most significant bits of the destination data. In an alternative embodiment, the execution unit includes plural multiplexers, one for each section of the destination data. Each multiplexer received data from each section of the source data register or registers. Special codes in the sections of the second source data register may select 0 fill, 1 fill or sign extension from the next most significant section for each multiplexer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.