Cavity structure for semiconductor structures
US7378724B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2005 |
| Grant date | May 27, 2008 |
| Priority date | — |
| Expiry date | Oct 19, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
A method for providing a cavity structure on a semiconductor device is provided. The method of forming the cavity structure, which may be particularly useful in packaging an image sensor, includes forming a spacer layer over a substrate. The spacer layer may be formed from a photo-sensitive material which may be patterned using photolithography techniques to form cavity walls surrounding dies on the wafer. A packaging layer, such as a substantially transparent layer, may be placed directly upon the cavity walls prior to curing. In another embodiment, the cavity walls are cured, an adhesive is applied to a surface of the cavity walls, and the packaging layer placed upon the adhesive. Thereafter, the wafer may be diced and the individual dies may be packaged for use.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.