Creating high-drive logic devices from standard gates with minimal use of custom masks
US7378874B2 · kind B2 · utility
5Cited by
27References
30Claims
0Family size
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Key dates
| Filing date | Aug 31, 2006 |
| Grant date | May 27, 2008 |
| Priority date | — |
| Expiry date | Dec 2, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/177
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Logic cells in an application-specific integrated circuit (ASIC) emulating standard gate sizing by duplicating elements within a single standard gate where logical high-drive gates are synthesized and converted to parallel elements as a post-process. The drive characteristics of the logical gates are retained during the conversion to the physical gate equivalents in the standard cell architecture. The logic cells in the device may include, for example, at least two two-input multiplexers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.