Embedded IC test circuits and methods
US7379716B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2005 |
| Grant date | May 27, 2008 |
| Priority date | — |
| Expiry date | Aug 4, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/0408
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A self-testing transceiver having an on-chip power detection capability is provided. The self-testing transceiver can include a semiconductor substrate and a transmitter having a high-power amplifier disposed on the substrate. The self-testing transceiver also can include a receiver disposed on the substrate for selectively coupling to an antenna. The self-testing transceiver can further include at least one power detector disposed on the semiconductor substrate for determining a power such as an RMS and/or peak-power of a signal at an internal node of the self-testing transceiver. Additionally, the self-testing transceiver can include a loopback circuit disposed on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.