Systems and methods for clock mode determination utilizing hysteresis
US7379834B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2005 |
| Grant date | May 27, 2008 |
| Priority date | — |
| Expiry date | Nov 2, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/14
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system for determining a data converter operating mode includes measurement circuitry operable to measure a master clock frequency of a master clock signal, the master clock frequency measurement biased by a past operating mode selection, and operable to measure a frequency ratio between a frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter. In an additional embodiment, the measurement circuitry biases the master clock frequency measurement based on a past master clock frequency measurement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.