Method for fabricating a thin-film transistor
US7381597B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 22, 2006 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | Jan 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
A method for fabricating a thin-film transistor contains successively forming four thin films on a substrate and performing an etching process to pattern the four thin films, wherein the four thin films are a first conductive layer, a first insulation layer, a semiconductor film, and a metal-containing sacrificial layer from bottom to top. A second insulation layer is formed on the substrate and the metal-containing sacrificial layer. Then, a lift-off process is performed to the metal-containing sacrificial layer for simultaneously removing the metal-containing sacrificial layer and the second insulation layer positioned on the metal-containing sacrificial layer. Finally, a second conductive layer is formed on the semiconductor layer for forming a source electrode and a drain electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.