Semiconductor integrated circuit
US7382020B2 · kind B2 · utility
10Cited by
3References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2005 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | Feb 23, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
Upstanding thin-film channel regions 5 having different heights are formed between source regions 7 and drain regions 8 of MOS transistors, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.