Patent · US Active

Low threshold voltage PMOS apparatus and method of fabricating the same

US7382024B2 · kind B2 · utility

27Cited by
8References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 3, 2007
Grant dateJun 3, 2008
Priority date
Expiry dateJan 3, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038

Abstract

A P-type metal oxide semiconductor (PMOS) device can include an N-well that does not extend completely throughout the active region of the PMOS device. For example, the PMOS device can be fabricated using a masking step to provide an N-well having an inner perimeter and an outer perimeter. The inner perimeter of the N-well surrounds at least a portion of the active region of the PMOS device. According to an embodiment, the inner perimeter of the N-well surrounds the entire active region. The PMOS device can include a deep N-well in contact with the N-well.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.