On-chip resistor calibration for line termination
US7382153B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2006 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | Aug 15, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0005
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for calibrating a resistance value on an integrated circuit includes a resistor network, a reference voltage generator, a comparator, a servo loop, and a shift register. The resistor network includes a plurality of resistor and switch pairs in parallel. The resistor network further includes a servo resistor in series with a servo resistor switch such that the servo resistor and servo resistor switch are in parallel with the plurality of resistor and switch pairs. The servo loop generates a shift register gating signal and includes a current sample register for storing a current comparator output data value and a previous sample register for storing a previous comparator output data value. The shift register, upon receipt of a shift register gating signal at a first state, inputs the current comparator output data value to shift data bits through the shift register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.