Method for matching semiconductor device behavior
US7382165B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2006 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | Sep 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A selection circuit and method. The selection circuit comprises a logic circuit, an array of sub-circuits and a switching circuit electrically coupled to each other. The selection circuit is subjected to a first operating condition. The switching circuit selects a group of sub-circuits from the array. The selection circuit generates a first frequency. The selection circuit is subjected to a second operating condition that is different from the first operating condition and generates a second frequency. A first frequency differential between the first frequency and the second frequency is compared to a predetermined frequency differential to determine if the first frequency differential is about equal to the predetermined frequency differential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.