Circuit and method for controlling hysteresis for bilevel signal transitions
US7382167B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2005 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | Apr 11, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/02337
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output signal is controlled with adjustable hysteresis in response to a variable voltage input signal. One or more signals derived from the input signal are respectively compared with first and second reference voltages of different magnitudes. The output signal changes from a first state to a second state when one of the derived signals reaches a first reference voltage level threshold, and changes from the second state to the first state when a second one of the derived signals reaches a second reference level voltage threshold. A first derived signal may be varied to have a voltage magnitude that is greater or lesser than the voltage magnitude of a second derived signal while maintaining a positive hysteresis level. The circuit may be configured to output a signal representing an undervoltage and/or overvoltage condition of the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.