Access time adjusting circuit and method for non-volatile memory
US7382655B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 23, 2006 |
| Grant date | Jun 3, 2008 |
| Priority date | — |
| Expiry date | Jul 23, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An access time adjusting circuit is used in a non-volatile memory to obtain an optimized access time in operation. The circuit includes an access time detecting unit, used to detect a performance status of the non-volatile memory under an operation clock and output the performance status. An access time controlling unit is used to generate at least one adjusting operation clock. Each adjusting operation clock serves as the operation clock for the non-volatile memory. In addition, the non-volatile memory, the access time controlling unit, and the access time detecting unit are connected to form a detection and adjustment loop, so that an optimized operation clock is determined after checking the at least one adjusting operation clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.