Patent · US Active

Non-volatile memory architecture for programmable-logic-based system on a chip

US7385418B2 · kind B2 · utility

22Cited by

1References

10Claims

0Family size

Assignee

Actel Corporation · US

Inventors

Theodore Speers · San Jose, US
Limin Zhu · Fremont, US
Kurt Kolkind · Truckee, US
Gregory Bakker · San Jose, US

Key dates

Filing date	Jul 26, 2006
Grant date	Jun 10, 2008
Priority date	—
Expiry date	Jul 26, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH03F2203/45166
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.