Multiprocessor control block for use in a communication switch and method therefore
US7385965B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2000 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Nov 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/56
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A communication switch that includes a multiprocessor control block and a method therefore is presented. The multiprocessor control block includes a centralized resource and routing processor that controls resource allocation and routing functionality within the switch. A plurality of intermediate processors operably coupled to the resource and routing processor perform call processing for corresponding portions of the connections supported by the switch, where such call processing includes issuing resource allocation requests to the resource and routing processor. Each of the intermediate processors further performs functions associated with a signaling layer portion of the protocol stack. The multiprocessor control block also includes a link layer processor operably coupled to the plurality of intermediate processors, where the link layer processor also couples to a switching fabric of the communication switch. The link layer processor receives ingress data units from the switching fabric and selectively forwards these ingress data units to one or more of the plurality of intermediate processors for processing. The link layer processor also received egress data units from the plu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.