Yield analysis method
US7386418B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2004 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Feb 2, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A yield analysis method. First, a wafer having multiple dies is inspected to obtain wafer defect data containing defect information for every die in the wafer. Then a wafer map and an overall yield are generated according to the wafer defect data. The wafer map displays defective dies and defect-free dies in the wafer. Then, first and second systematic limited yields are calculated in accordance with the wafer defect data and the wafer map, wherein the first systematic limited yield is calculated excluding defective dies with localized distribution, and the second systematic limited yield is calculated excluding defective dies with repeated distribution. Then a random defect limited yield is determined in accordance with the overall yield, the first systematic limited yield, and the second systematic limited yield.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.