Communication among partitioned devices
US7386688B2 · kind B2 · utility
3Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2004 |
| Grant date | Jun 10, 2008 |
| Priority date | — |
| Expiry date | Sep 29, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1458
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Information objects and system firmware for a processor in a partitionable computing system are disclosed. One object comprises information corresponding to components of the computer system. The information comprises entries defining an address and a size for registers normally accessible to other partitions. The registers are capable of defining an address area such that in use the processor is arranged to permit other partitions to access at least one address area defined by the at least one register and to deny other partitions access to address areas other than the at least one accessible address area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.