Enhanced digital predistortion
US7388430B2 · kind B2 · utility
0Cited by
6References
17Claims
0Family size
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Inventor
Key dates
| Filing date | Jun 27, 2006 |
| Grant date | Jun 17, 2008 |
| Priority date | — |
| Expiry date | Sep 27, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment of the present invention, a weight vector is generated based on a pre-distorted input signal and an output signal of an amplifier using a computation reduction technique. The computation reduction technique decomposes a number of multiplication operations between complex numbers such that a number of multiplications and a number of additions to generate the weight vector is reduced as compared to if the number of multiplication operations between complex numbers was not decomposed. An input signal for input to an amplifier is pre-distorted based on the generated weight vector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.