Reduced power consumption for a graphics accelerator and display
US7388579B2 · kind B2 · utility
7Cited by
8References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 1, 2003 |
| Grant date | Jun 17, 2008 |
| Priority date | — |
| Expiry date | Feb 13, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The preferred embodiments of the present invention provide a system and method for reducing the battery power required by a handheld device (300) that incorporates a graphical display (301). Graphical display (301), display drivers (307), LCD controller (403) and a memory (405) are optimized such that several pixels of information may be clocked simultaneously when the device is operating in a partial display mode. The optimized circuitry reduces the required refresh clock frequency (411) and thus the current drain on a device battery (319) thereby improving device operation time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.