Thin-film transistor array substrate and liquid crystal display device
US7388625B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2005 |
| Grant date | Jun 17, 2008 |
| Priority date | — |
| Expiry date | Dec 19, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136213
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A TFT array substrate is provided with an auxiliary capacitance that has a plurality of lower electrodes disposed for each pixel in the row and column directions below a pixel TFT and connected to the drain area of the corresponding pixel TFT. The distances L1 and L2 between separation areas formed between the lower electrodes adjacent in the row direction and the channel areas of the two pixel TFTs that correspond to the lower electrodes are substantially equal to each other. The distances L3 and L4 between separation areas formed between the lower electrodes adjacent in the column direction and the channel areas of the two pixel TFTs that correspond to the lower electrodes are substantially equal to each other. Furthermore, an upper electrode is disposed above the separation areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.