System and method for dual IDE channel servicing using single multiplexed interface having first and second channel transfer over a common bus
US7389366B2 · kind B2 · utility
5Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 1, 2005 |
| Grant date | Jun 17, 2008 |
| Priority date | — |
| Expiry date | Aug 16, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated receiver with dual channel transport stream decoding and delivery substantially implemented on a single CMOS integrated circuit is described. For multiple channel transfers to hard disk drive storage, a multiplexed IDE host interface is provided with shared pins for data, address, and chip-select lines of the IDE interface so that multiple hard drives may be interfaced using the common pins of the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.