Method, microprocessor system for critical safety regulations and the use of the same
US7389390B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 6, 2002 |
| Grant date | Jun 17, 2008 |
| Priority date | — |
| Expiry date | Sep 26, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1658
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method of operating a microprocessor system provided with safety functions, which comprises two or more processor cores (1, 2) and periphery elements (5, 7) on a common chip carrier, to which the cores can have access for write or read operations, a distinction is made between algorithms for safety-critical functions and algorithms for comfort functions.Further, a microprocessor system appropriate for implementing the method, and the use of the same, has process cores connected to periphery elements (5,6,7,8,9,10) by way of bus systems (3, 4), and bus driver circuits (19) can transmit bus information from one bus to another with the provision of at least one address comparator (18).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.