Concatenated equalizer/trellis decoder architecture for an HDTV receiver
US7389470B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2003 |
| Grant date | Jun 17, 2008 |
| Priority date | — |
| Expiry date | Jan 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A concatenated equalizer/trellis decoding system for use in processing a High Definition Television signal. The re-encoded trellis decoder output, rather than the equalizer output, is used as an input to the feedback filter of the decision feedback equalizer. Hard or soft decision trellis decoding may be applied. In order to account for the latency associated with trellis decoding and the presence of twelve interleaved decoders, feedback from the trellis decoder to the equalizer is performed by replicating the trellis decoder and equalizer hardware in a module that can be cascaded in as many stages as needed to achieve the desired balance between complexity and performance. The present system offers an improvement of between 0.6 and 1.9 decibels. Cascading of two modules is usually sufficient to achieve most of the potential performance improvement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.