Serial link output stage differential amplifier and method
US7391266B2 · kind B2 · utility
0Cited by
7References
2Claims
0Family size
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Key dates
| Filing date | Sep 14, 2006 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Oct 31, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45702
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Protection for the transmission of higher amplitude outputs required of differential amplifiers formed by thin oxide transistors with limited maximum voltage tolerance used where compliance with communication protocol standards requires handling voltages which may, in transition, exceed desirable levels is provided by limiting the voltage across any two device terminals under power down conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.