Adjustment of PLL bandwidth for jitter control using feedback circuitry
US7391271B2 · kind B2 · utility
8Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2006 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Sep 6, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Jitter method and control circuit for a circuit block in a transceiver system having a phase lock loop circuit which includes an oscillator, a charge pump connected to the oscillator to add or subtract charge to or from said oscillator, and a low pass filter connected to said charge pump are provided. Circuitry is connected to the output of the oscillator and the input of the charge pump to control the amount of charge added to or subtracted from the charge pump to control the bandwidth output by the oscillator and thereby reduce jitter in the phase lock circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.