Centralized memory based packet switching system and method
US7391786B1 · kind B1 · utility
32Cited by
17References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2002 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Aug 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3045
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A packet switching system and method are disclosed. The system includes a plurality of input and output ports and an input buffer at each of the input ports. The system further includes an input scheduler associated with each of the input buffers and a centralized memory shared by the output ports. An output buffer is located at each of the output ports and an output scheduler is associated with each of the output ports. Each of the input buffers comprises a plurality of virtual output queues configured to store a plurality of packets in a packed arrangement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.