Method and system for a three conductor transceiver bus
US7391788B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2002 |
| Grant date | Jun 24, 2008 |
| Priority date | — |
| Expiry date | Jan 20, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/40
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Aspects of the invention provide a method and system for a communication bus for resetting one or more devices connected to the bus. The transceiver bus (620) may include a single serial data line (616), a single serial clock line (614) and a single reset line (612). A status of a slave device coupled to the transceiver bus (620) may be determined by a master device. Based on the status of the slave device, the master device may execute a forced reset or a normal reset. In a case where a device may be unresponsive, the master device may execute a forced reset. Additionally, in a case where a device is responsive but requires resetting, the master device may execute a normal reset and selectively reset a slave device requiring reset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.