Method and system for correlating practical constraints in a network
US7394760B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2003 |
| Grant date | Jul 1, 2008 |
| Priority date | — |
| Expiry date | Dec 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L43/045
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method for identifying optimal mapping of logical links to the physical topology of a network is provided. Upon obtaining one or more mapping options for mapping multiple logical links between one or more pairs of network nodes onto physical paths that are at least relatively disjoint and obtaining a maximum time delay allowed between the each pair of network nodes, the mapping options are correlated with the maximum time delay to identify optimal mapping of logical links to the physical topology of a network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.