Method and apparatus for decoding forward error correction codes
US7395495B2 · kind B2 · utility
11Cited by
8References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 10, 2004 |
| Grant date | Jul 1, 2008 |
| Priority date | — |
| Expiry date | Jan 14, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W84/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for decoding information received at a network device may include a first decoding process which applies a first algorithm iteratively until a stopping criterion is reached and a second decoding process which may flip a logic state of one or more bits. In one implementation using low density parity check (LDPC) codewords, bits may be flipped after evaluating check nodes having the lowest metrics and/or assessing the parity relationships of bit nodes and/or edges associated with those check nodes. Devices and systems for decoding are also disclosed as well as various other embodiments.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.