DC motor phase estimation with phase-locked loop
US7397212B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 30, 2006 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | Nov 29, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02P2203/11
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A DC motor phase estimation algorithm that estimates a speed-related harmonic frequency of a DC motor current under dynamic load conditions having known geometry parameters. The algorithm estimates the phase and magnitude of a complex coefficient in a complex single frequency adaptive filter that receives a primary signal from the motor current and estimates a reference signal using an incident frequency by adapting the complex coefficient to match the magnitude and phase of the speed-related harmonic component of the primary signal. The rate of change of the phase of the complex coefficient is determined by a phase-lock loop coupled to the adaptive filter to adapt a dynamic incident frequency corresponding to a single frequency component of interest in the primary signal. The incident frequency is extracted, and the motor speed is estimated using the extracted incident frequency and the known motor geometry parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.