Voltage level translator circuit with wide supply voltage range
US7397279B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2006 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | Apr 25, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356104
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage level translator circuit for translating an input signal referenced to a first voltage supply to an output signal referenced to a second voltage supply includes an input stage for receiving the input signal, the input stage including at least one transistor device having a first threshold voltage associated therewith. The voltage level translator circuit further includes a latch circuit operative to store a signal representative of a logic state of the input signal, the latch circuit including at least one transistor device having a second threshold voltage associated therewith, the second threshold voltage being greater than the first threshold voltage. A voltage clamp circuit is connected between the input stage and the latch circuit. The voltage clamp circuit is operative to limit a voltage across the input stage, an amplitude of the voltage across the input stage being controlled as a function of a voltage difference between the first and second voltage supplies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.