Method and relative circuit for generating a control voltage of a synchronous rectifier
US7397290B2 · kind B2 · utility
1Cited by
5References
25Claims
0Family size
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Key dates
| Filing date | May 12, 2006 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | Jan 23, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A control voltage for a synchronous rectifying transistor is generated with the desired anticipation time. The anticipation time is continuously controlled with a closed-loop technique by comparing it with the duration of a reference pulse. The resulting error signal is processed and provides the necessary correction to the MOSFET gate signal to equalize the actual anticipation time to the duration of the reference pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.