Redundant clock source
US7397314B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 11, 2002 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | May 26, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A redundant clock source provides a stable clock source for digital system. The clock source uses two oscillators to generate a clock signal. If one of the oscillators fails, the clock signal is generated from the other oscillator until the failed oscillator is replaced. Special filtering of the waveforms produced by the oscillators makes the clock source is resistant to jitter from the oscillators and transients that occur when an oscillator fails. This allows the clock source to not only use a redundant oscillator in an attempt to eliminate a single point of failure, but to also provide a stable clock signal even if one oscillator fails.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.