Low power operation of an address interleaver
US7398446B2 · kind B2 · utility
2Cited by
9References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 29, 2003 |
| Grant date | Jul 8, 2008 |
| Priority date | — |
| Expiry date | Dec 6, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2764
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A first interleaved address generator is configured to generate a first interleaved address, and a second interleaved address generator is configured to generate a second interleaved address substantially concurrently with the first interleaved address generator generating the first interleaved address. A controller is configured to disable the second interleaved address generator from generating the second interleaved address if the second interleaved address is not needed to produce a continuous stream of interleaved addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.