Low noise data conversion circuits and methods and systems using the same
US7400284B1 · kind B1 · utility
1Cited by
4References
28Claims
0Family size
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Key dates
| Filing date | Mar 29, 2004 |
| Grant date | Jul 15, 2008 |
| Priority date | — |
| Expiry date | Sep 10, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/0614
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit including a first element sampling noise from and discharging noise to a signal line in response to an input signal transitioning on selected edges of a clock signal. A second element samples noise from and discharges noise to the signal line in response to another input signal transitioning on other edges of the clock signal differing from the selected edges of the clock signal such that noise coupled into substrate and supply are independent of the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.