Method for wiring allocation and switch configuration in a multiprocessor environment
US7401203B2 · kind B2 · utility
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9References
1Claims
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Key dates
| Filing date | Sep 14, 2004 |
| Grant date | Jul 15, 2008 |
| Priority date | — |
| Expiry date | Sep 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2209/5012
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for wiring allocation and switch configuration in a multiprocessor computer, the method including employing depth-first tree traversal to determine a plurality of paths among a plurality of processing elements allocated to a job along a plurality of switches and wires in a plurality of D-lines, and selecting one of the paths in accordance with at least one selection criterion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.