Demand-based dynamic clock control for transaction processors
US7401243B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2005 |
| Grant date | Jul 15, 2008 |
| Priority date | — |
| Expiry date | Jun 17, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A variable speed data processor includes a clock generator generating a plurality of clocks at different clock rates. Clock select circuitry synchronously selects one of the clocks as an output clock signal to data processing circuitry, based on a data activity indication. Activity logic generates the data activity indication based at least in part on the existence of data processing activity targeted to the data processing circuitry. When the data processing circuitry experiences bursty data processing activity, the clock rate can shift rapidly between the multiple clock rates, conserving power without substantially diminishing the availability of the data processing circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.