Stacking series of non-power-of-two frame buffers in a memory array
US7403203B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2005 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Jan 19, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0223
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Storing frames of data in frame buffers sized to match the frame size when the frame size is not a power-of-two number of bytes is disclosed. The buffer size is chosen to be the largest power-of-two that is less than the frame size. When a frame of data is to be stored, the buffer number of a free buffer is effectively multiplied by the buffer size to obtain a partial frame buffer address Q. The buffer size subtracted from the frame size is referred to as a residual buffer size, and the buffer number is effectively multiplied by the residual buffer size to obtain a residual frame buffer address R. The full frame buffer starting address S=Q+R. For implementations where the difference between the frame size and the buffer size is a power-of-two value, binary shifts and addition can be used instead of a multiplier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.