Method and system for resequencing data packets switched through a parallel packet switch
US7403536B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 26, 2003 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Sep 27, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/568
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method to resequence packets includes sequentially allocating in each source ingress adapter a packet rank to each packet received within each source ingress adapter. In each destination egress adapter, each ranked data packet is stored at a respective buffer address of an egress buffer. The respective buffer addresses of data packets received by a same source ingress adapter with a same priority level and switched through a same switching plane are linked in a same linked-list. The respective buffer addresses are preferably linked by their order of use in the egress buffer, and thus each linked-list is having a head list pointing to the oldest buffer address. The linked-lists are sorted into subsets including those linked-lists linking the respective buffer addresses of data packets received by a same source ingress adapter with a same priority level. For each subset of linked-lists, the packet ranks of the data packets stored at the buffer address pointed by the head lists of each linked-list of each subset are compared to determine the next data packet to be put in a sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.