Cyphering/decyphering performed by an integrated circuit
US7403620B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 2003 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Mar 21, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/08
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method of cyphering and/or decyphering, by an integrated circuit, of a digital input code by means of several keys, comprising: dividing the code into several data blocks of same dimensions; and applying to said blocks several turns of a cyphering or decyphering comprising submitting each block to at least one same non-linear transformation and of subsequently combining each block with a different key at each turn, the operands being masked, upon execution of the method, by at least one first random number having the size of the code and all the blocks of which have the same value by combining, by an XOR-type function, the input and output blocks of the non-linear transformation with said random number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.