Voltage supply noise analysis
US7403885B2 · kind B2 · utility
0Cited by
8References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2004 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Apr 5, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for implementing voltage supply noise analysis for electronic circuits are disclosed. In an exemplary embodiment a computer program product executes a computer process. The computer process generates at least one spatial profile for the electronic circuit, generates at least one temporal profile for the electronic circuit, merges the at least one temporal profile and the at least one spatial profile, and determines if the electronic circuit is operating within acceptable voltage noise margins based on the merged temporal and spatial profiles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.